2D router chip design, analysis, and simulation for effective communication

Abstract

The  router  is  a  network  device  that  is  used  to  connect  subnetwork  and packet-switched networking by directing the data packets to the intended IP addresses.  It  succeeds  the  traffic  between  different  systems  and  allows several devices to share the internet connection. The router is applicable for the effective commutation in systemonchip (SoC) modules for networkonchip (NoC) communication. The research paper emphasizes the design of the twodimensional(2D)  router  hardware  chip  in  the  Xilinx  integrated  system environment (ISE) 14.7 software and further logic verification using the data packets  transmitted  from  all  input/output  ports.  The  design  evaluation  is done  based  on  the  pre-synthesis  device  utilization  summary  relating  to different field programmable gate array (FPGA) boards such as Spartan-3E (XC3S500E),   Spartan-6   (XC6SLX45),   Virtex-4   (XC4VFX12),   Virtex-5 (XC5VSX50T),   and   Virtex-7   (XC7VX550T).   The   64-bit   data   logic  is verified  on  the  different  ports  of  the  router  configuration  in  the  Xilinx  and Modelsim  waveform  simulator.  The  Virtex-7  has  proven  the  fast-switching speed and optimal hardware parameters in comparison to other FPGAs.